Short Courses

On Sunday, August 8th, several exciting short courses will be offered for conference participants. If you are interested in leading a short course, please send a note to the Invited Sessions and Tutorials Chair, Edgar Sanchez-Sinencio, at sanchez@ee.tamu.edu.

1. Digital Signal Processing and Applications – (8:30am-12:30pm)
   By Bob Hewes, Texas Instruments.
   
   
2. Feedback in Linear Circuits Made Crystal Clear - (8:30am-12:30pm)
   By Agustin Ochoa, QEDesign.
   Feedback is a powerful tool in the design of analog systems used to reduce system response sensitivity to parameter violations of device elements. Improper use of feedback, however, will cause the circuit to oscillate or clamp at a rail. The analysis of electronic circuits, and of circuits containing feedback in particular, generally follows one of two paths--a mathematically complete methodology of writing nodal relations followed by matrix algebra, or a more intuitive approach based on experience. Neither of these approaches is instructive in understanding the elements of feedback. This short course will introduce a new approach using Driving Point Impedance and Signal Flow Graphs to fully analyze feedback systems. Loop gains for stability analysis will be generated in a manner fully accounting for all loading effects as well as the feedforward component of signal flow. The course will cover:
   
   The Driving Point Impedance/Signal Flow Graph Method
   
   Analyzing the Differential Amplifier without 'Half-Cells'
   
   Port Impedances Using DPI/SFG
   
   The Two-Stage Amplifier and Miller Compensation
   
   Translating Noise Signals around a Circuit
   
   Complete Analysis of Feedback and Stability
       Fully Loaded Loop Gains
       Phase Margin
       Finding Loop Gain Using Spice
   
   For more information on the DPI/SFG methodology, see http://members.aol.com/QEDesign/
   or contact the instructor at QEDesign@aol.com.
   
   
3. High-Speed/High Resolution Data Converters – (8:30am-12:30pm)
   By Mansour Keramat, Texas A&M University.
   This short course covers the following topics:

   Design of Track & Hold

   A/D Architectures

   1. Flash
   2. Folding & Interpolating
   3. Pipelined Architecture
   4. Successive Approximation
   5. Sigma-Delta

   D/A Architectures

   1. Resistor-Ladder Architectures
   2. Current-Steering Architectures
   3. Sigma-Delta D/A

   For more information, please contact the instructor at keramat@ultra1.tamu.edu .

4. Analog and Mixed-signal Design for Test Techniques - (1:45pm-5:45pm)
   By Adoracion Rueda, Centro Nacional de Microlectroncia, Sevilla.
   The increased demand of complex mixed analog/digital ICs has made designing and testing processes two new challenging issues. The majority of testing problems come from the inherent difficulty of testing analog circuits, which is further aggravated when they are embedded in a mixed-signal circuit. The results are high test time (cost), high time to market, and reduced product reliability. Design-for-Test (DFT) appears as a topic that alleviates many of the testing problems by considering test methodologies at the early stage of design. This tutorial reviews the state-of -the-art of DFT techniques for analog and mixed-signal circuits. The topics presented include on- and off-line testing techniques, test generation problems and approaches, Built-in Self-Test (BIST) solutions, and testability-driven layout optimization. For more information, contact the instructor at rueda@imse.cnm.es.
   
   
5. Advanced CMOS Digital Integrated Circuit Design Techniques - (1:45pm-5:45pm)
   Presented by: Yusuf Leblebici, co-author of "CMOS Digital Integrated Circuits", McGraw Hill.
   Topics include:
   

Introduction to CMOS fabrication technology; advances and limitations; implications and impact of deep sub-micron CMOS technologies.

Design of fundamental CMOS digital circuits; combinational and sequential logic blocks.

Dynamic CMOS circuit design techniques; advantages and constraints; Domino CMOS and TSPC techniques for high-performance design.

Interconnect effects; modeling of interconnect parasitics; estimation of interconnect delay in sub-micron CMOS IC design.

Low-power CMOS logic circuit design techniques; low-voltage operation principles; MT-CMOS and VT-CMOS circuit design.

For more information on this short course, contact the instructor at leblebic@ece.wpi.edu .

6. Design of Microelectromechanical (MEM) Structures - (1:45pm-5:45pm)
   By Mona Zaghoul, George Washington University